EN5394QI: DC-DC Converter Integrated Inductor 2

Enable operation

The enable pin provides a way to start or shut down the device normally. A logic high level will cause the converter to switch to normal operation. When the ENABLE pin is set to (high), the device will perform a normal soft start. A logic low level will disable the converter. The logic low level will provide power to a controlled device in a downward manner and subsequently shut down the device. The device will remain in the off enable lock for a duration of time. If the ENABLE signal is reset during this period, the device will have the power locked to the enable time at the end of the normal soft start. The activation threshold is a precise analog voltage, not a digital logic threshold. With the precision of the selected soft start threshold, capacitors help to accurately sequence multiple power supply devices in the system.diode

Frequency synchronization

The switching frequency of the DC/DC converter can be locked to an external clock source to move unwanted beats out of the band. Using this function, the M/S pin of the ternary input should float or be pulled low. The clock of the internally switched DC/DC converter can then be phase locked to the clock signal applied to the s_IN pin. The activity detector recognizes the presence of an external clock signal and automatically locks the phase of the internal oscillator to this external clock. Phase locking will occur as long as the input clock frequency is within ± 10% of the operating frequency. If there is no clock signal present, the device returns to the free running frequency of the internal oscillator. The external clock input is between 3.6 MHz and 4.4 MHz, which can sweep up to 10 kHz to reduce the frequency components of repetition rate EMI.diode