Date:2025-09-19 Categories:Product knowledge Hits:274 From:Guangdong Youfeng Microelectronics Co., Ltd
=-5V ± 0.2V, with ± 5mV/° C worst-case shift positive power supply
=+5V ± 0.2V, with ± 5mV/° C worst-case scenario shifting initial 25 ° C output DC error band
=± 0.3mV (due to PSRR=1.59mV/V •± 0.2V)
± 0.04mV (due to+PSRR=0.2mV/V •± 0.2V)
± 0.6mV input bias voltagediode
Total=± 0.94mV
This will be the worst error band in mass production under 25 ° C acceptance test conditions. diode
Within the temperature range of 0 ° C to 70 ° C, we can expect the following worst-case scenarios to shift from the initial values. It is assumed here that the internal structure self heats up at 20 ° C.diode
± 0.36mV (OPA656 advanced input offset drift)=± 6 μ V/° C • (70 ° C+20 ° C – 25 ° C)
± 0.23mV (PSRR of -60dB, 5mV • (70 ° C-25 ° C) power switching)
± 0.06mV (+PSRR of 72dB, 5mV • (70 ° C-25 ° C) power switching)
Total=± 0.65mV
This will be the worst-case scenario for an environment with an initial offset exceeding 0 ° C to 70 ° C under specified conditions. The typical initial output DC error band and temperature drift will be significantly lower than these worst-case estimates.
In transient configurations, CMRR errors can be ignored as the input common mode voltage remains at ground. For non vertical gain configurations (see Figure 1), the CMRR term needs to be considered, but it is usually much lower than the input bias voltage term. Under the condition of testing a minimum of 80dB (100 μ V/V), the apparent DC error caused by the ± 2V input swing increase in the circuit of Figure 1 does not exceed ± 0.2mV.diode
Power precautions
OPA656 is used for operation on ± 5V power supply. Allow single power operation, with minimal variation in maximum value from single+8V to+12V based on specified specifications and performance. The limitation of reducing the power supply voltage operation is the available input voltage range of the JFET input stage. There are many advantages to operating from a single power source of+12V. In the case of negative ground power supply, the DC error caused by the PSRR term can be minimized. Usually, when operating at+12V, there is a slight improvement in AC performance and the increase in power supply current is minimal.diode
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