OPA656 is a broadband, unity gain stable, field-effect transistor input operational amplifier 13

b) Minimize the distance (<0.25 ") from the power pin to the high-frequency 0.1U F decoupling capacitor. At the device pins, the grounding and power plane layout should not be close to the signal I/O pins. Avoid narrow power and ground traces to diode minimize inductance between pins and decoupling capacitors. The power connection should always be decoupled from these capacitors. Larger decoupling capacitors (2.2 μ F to 6.8 μ F) are effective at low frequencies and are also used on power pins. These can be placed slightly away from the device and can be shared among multiple devices in the same area of the PC board.

c) Careful selection and placement of external components will maintain the high-frequency performance of OPA156. Resistors should be of extremely low reactance type. Surface mounted resistors work best and allow for a tighter overall layout. Metal thin films and carbon component axial lead resistors can also provide good high-frequency performance. Similarly, keep the wire and PCB tracking length as short as possible. Do not use wire wound resistors in high-frequency applications. Due to the sensitivity of the output pin and inverter input pin to parasitic capacitance, feedback and series output resistors (if any) should always be placed as close as possible to the output pin. Other network components, such as non rotating input terminal resistors,diode  should also be placed near the packaging. If double-sided component installation is allowed, place the feedback resistor directly under the package on the other side of the board, between the output terminal and the reverse input pin. Even when shunting external resistors with low parasitic capacitance, excessively high resistance values can result in significant time constants, thereby reducing performance. The parallel resistance of a good axial metal film or surface unloading resistor when connected in parallel with a resistor is about 0.2pF. For resistance values>1.5k Ω, this parasitic capacitance can add a pole and/or zero below 500 MHz, which can affect circuit operation. Keep the resistance value as low as possible to comply with load driving considerations. A good starting point for design is to maintain RF | RG<250 Ω for voltage amplifier applications. diode This will automatically keep the resistance noise low and minimize the impact of parasitic capacitance. As long as all parasitic capacitance terms on the inverter node are considered and feedback compensation capacitors are set, transient applications (see Figure 3) can use any feedback resistor required by the application.diode